Methods and apparatus for efficient memory usage

ABSTRACT

In a first aspect, a first method is provided for efficient memory usage. The first method includes the steps of (1) determining whether data retrieved from a first storage device is characterized as data that is primarily read; and (2) if data retrieved from the first storage device is characterized as data that is primarily read (a) writing the retrieved data in a temporary storage device with short write latency; and (b) writing the retrieved data in a high-density memory. Numerous other aspects are provided.

FIELD OF THE INVENTION

The present invention relates generally to processors, and moreparticularly to methods and apparatus for efficient memory usage.

BACKGROUND

A computer system may include volatile memory, such as DRAM. Thecomputer system performance may be directly proportional to the amountof memory included in the computer system. However, the amount of memory(e.g., DRAM) that may be included in the computer system may be limiteddue to heat generation, cost, physical packaging constraints, etc.,associated with such memory. Accordingly, methods and apparatus forefficient memory usage are desired.

SUMMARY OF THE INVENTION

In a first aspect of the invention, a first method is provided forefficient memory usage. The first method includes the steps of (1)determining whether data retrieved from a first storage device ischaracterized as data that is primarily read; and (2) if data retrievedfrom the first storage device is characterized as data that is primarilyread (a) writing the retrieved data in a temporary storage device withshort write latency; and (b) writing the retrieved data in ahigh-density memory.

In a second aspect of the invention, a second method is provided forefficient memory usage. The second method includes the steps of (1)determining whether data retrieved from a first storage device will onlybe read; and (2) if data retrieved from the first storage device isread-only data (a) storing the retrieved data in a temporary storagedevice with low write latency; and (b) writing the retrieved data in ahigh-density memory.

In a third aspect of the invention, a method is provided. The methodincludes the steps of (1) storing data that is characterized asprimarily read in high-density memory and temporary memory; (2)retrieving the data from temporary memory until the data has been storedin high-density memory; and (3) releasing the temporary memory once thedata has been stored in the high-density memory.

In a fourth aspect of the invention, a first apparatus is provided forefficient memory usage. The first apparatus includes (1) a high-densitymemory; (2) a volatile memory; (3) a first storage device; (4) atemporary storage device with short write latency; and (5) a monitoringdevice, coupled to the high-density memory, volatile memory, firststorage device, temporary storage device, and adapted to identify datawhich is characterized as primarily read. The apparatus is adapted to(a) determine whether data retrieved from the first storage device ischaracterized as data that is primarily read; and (b) if data retrievedfrom the first storage device is characterized as data that is primarilyread (i) write the retrieved data in the temporary storage device; and(ii) write the retrieved data in the high-density memory.

In a fifth aspect of the invention, a second apparatus is provided forefficient memory usage. The second apparatus includes (1) a high-densitymemory; (2) a volatile memory; (3) a first storage device; (4) atemporary storage device with low write latency; and (5) a monitoringdevice, coupled to the high-density memory, volatile memory, storagedevice and temporary storage device. The apparatus is adapted to (a)identify data retrieved from the first storage device as read-only data;and (b) if data retrieved from the first storage device is characterizedas read-only data (i) store the retrieved data in the temporary storagedevice; and (ii) write the retrieved data in the high-density memory.

In a sixth aspect of the invention, an apparatus is provided. Theapparatus includes (1) a high-density memory; (2) a temporary memorywith a low write latency; and (3) a monitoring device, coupled to thehigh-density memory and temporary memory, and adapted to identify dataas primarily read. The apparatus is adapted to (a) store data that ischaracterized as primarily read in high-density memory and temporarymemory; (b) retrieve the data from temporary memory until the data hasbeen stored in high-density memory; and (c) release the temporary memoryonce the data has been stored in the high-density memory.

In a seventh aspect of the invention, a third method for efficientmemory usage is provided. The third method includes the steps of (1)determining whether data retrieved from a first storage device ischaracterized as data that is primarily read; and (2) if data retrievedfrom the first storage device is characterized as data that is primarilyread, writing the retrieved data in a high-density memory.

In an eight aspect of the invention, a third apparatus for efficientmemory usage is provided. The third apparatus includes (1) ahigh-density memory; (2) a volatile memory; (3) a first storage device;and (4) a monitoring device, coupled to the high-density memory,volatile memory and first storage device. The third apparatus is adaptedto (a) determine whether data retrieved from the first storage device ischaracterized as data that is primarily read; and (b) if data retrievedfrom the first storage device is characterized as data that is primarilyread, write the retrieved data in the high-density memory. Numerousother aspects are provided in accordance with these and other aspects ofthe invention.

Other features and aspects of the present invention will become morefully apparent from the following detailed description, the appendedclaims and the accompanying drawings.

BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is a block diagram of an apparatus for efficient memory usage inaccordance with an embodiment of the present invention.

FIG. 2 illustrates a method for efficient memory usage in accordancewith an embodiment of the present invention.

FIG. 3 is a process flow diagram for efficient memory usage inaccordance with an embodiment of the present invention.

FIGS. 4-5 illustrate a method for writing to high-density memory inaccordance with an embodiment of the present invention.

DETAILED DESCRIPTION

The present invention provides methods and apparatus for improving theefficiency of memory usage. More specifically, according to the presentinvention, a computer system may include at least one volatile memory(e.g., DRAM) and at least one high-density memory, (e.g., non-volatilememory, flash memory, etc.) as its main memory for storing data. Thepresent invention takes advantage of the fact that high-density memorytypically may store more memory in a smaller area, performs fast readsbut slow writes, is less expensive and consumes less power for data readoperations than the volatile memory. The present invention may monitormemory (e.g., DRAM, hard disk, or the like) usage, via software orhardware, to determine whether data stored in such memory may becharacterized as data that is infrequently (or never) written (e.g.,characterized as “primarily-read” data). By writing (e.g., storing) suchdata in high-density memory (e.g., flash memory), the present inventionmay reduce an overall memory power consumption and memory cost whileincreasing memory density, and therefore, memory capacity.

When the present invention determines data requested from memory (e.g.,DRAM, hard disk, or the like) may be characterized as data that isinfrequently (or never) written, the present invention may write thedata in a temporary storage device, such as a workspace in the DRAM or acache memory, from which the data may be written (relatively slowly) tothe high-density memory (e.g., flash memory). In this manner, such dataremains available to be accessed from the temporary storage device whilethe data is being written to the high-density memory. Further, thepresent invention provides methods and apparatus for writing to datastored in the high-density memory.

By employing high-density memory for storing data which is characterizedas data that is infrequently (or never) written (e.g., datacharacterized as “primarily-read”) and volatile memory for storing othertypes of data, the present invention may reap the high-density memorybenefits of lower cost, lower power consumption for data read operationsand increased density, and avoid a high-density memory drawback of longwrite latency, thereby efficiently using memory.

FIG. 1 is a block diagram of an apparatus for efficient memory usage inaccordance with an embodiment of the present invention. The apparatusmay be a computer system or similar device. With reference to FIG. 1,the apparatus 100 may include a processor 102 for executinginstructions. The processor 102 is coupled to main memory 104 (e.g., viaa memory controller 106 which may include control logic). The mainmemory 104 includes one or more volatile memories 108, such as DRAMs orthe like, and one or more high-density memories 110, such as flashmemories or the like. Read and write operations to the volatile memory108 and a read operation to the high-density memory 110 may be completedquickly. However, a write operation to the high-density memory 110relatively may take substantially more time than the above-mentionedoperations. For example, read and write operations to the volatilememory 108 may be completed in nanoseconds. Similar to a read operationon the volatile memory 108, a read operation on the high-density (e.g.,flash) memory 110 may be completed in nanoseconds. However, in contrastto the volatile memory 108, a write operation to the high-density memory110 may require milliseconds to complete, and therefore, may result inlong write latency.

The memory controller 106 is also coupled to a first storage device 112,such a disk drive, memory or the like. In response to a request from theprocessor 102, the memory controller 106 may retrieve data stored in thefirst storage device 112 and write (e.g., store) such data in the mainmemory 104. For example, a page (e.g., 4 kB or more) of data may beretrieved from the storage device 112 and stored in the main memory 104.

The apparatus 100 may include a monitoring device for identifying memorylocations that are characterized as infrequently or never written to. Insome embodiments, the processor 102 may serve as the monitoring deviceby executing software 114. Such software 114 may be included in anoperating system (OS) executed by the processor 102. In someembodiments, the OS may be stored in a read-only memory (ROM) 116.However, the software 114 may be separate from the OS.

Alternatively, the apparatus 100 may include monitoring logic 118 (shownin phantom) that serves as the monitoring device. The memory controller106 and/or monitoring logic 118 may include any suitable combination oflogic, registers, memory or the like. In some embodiments, the memorycontroller 106 includes the monitoring logic 118 (although themonitoring logic 118 may be located elsewhere.)

The apparatus 100 may include a second (e.g., temporary) storage devicethat may store data retrieved from the first storage device 112 beforesuch data is stored in the high-density memory 110. The second storagedevice may perform a read and/or write operation with short latency. Inthis manner, data retrieved from the first storage device 112 may bestored quickly (e.g., in nanoseconds) in the temporary storage deviceand data to be written to the high-density memory 110 may be readquickly (e.g., in nanoseconds) from the temporary storage device. Insome embodiments, a portion 120 of the volatile memory 108 (e.g., DRAM)is allocated as a working space that serves as the temporary storagedevice. Alternatively, the apparatus 100 may include a cache memory 122(shown in phantom) that serves as the temporary storage device. In suchembodiments, the cache memory 122 may be coupled to and/or included inthe memory controller 106.

As described above, the apparatus 100 includes high-density (e.g.,flash) memory 110, which is denser, less expensive and consumes lesspower than volatile memory (e.g., DRAM) 108 for performing a readoperation. Therefore, the present invention may allow more memory to becoupled to the processor 102 than a conventional computer system with amain memory which only consists of DRAM.

The operation of the apparatus for efficient memory usage is nowdescribed with reference to FIG. 1 and with reference to FIG. 2 whichillustrates a method for efficient memory usage in accordance with anembodiment of the present invention. With reference to FIG. 2, in step202, the method 200 begins. In step 204, it is determined whether dataretrieved from a first storage device 112 is characterized as data thatis primarily read. For example, the monitoring device (e.g., processor102 or monitoring logic 118) of the apparatus 100 identifies theretrieved data as primarily-read based on (e.g., by monitoring for) (1)a page attribute associated with a command to retrieve such data; (2) amemory address associated with the command (e.g., whether the memoryaddress is included in a range of memory addresses identified asprimarily-read); and/or (3) memory access patterns (e.g., to thevolatile memory) for the memory address associated with the command.Examples of primarily-read data include but are not limited to a codesegment, web page, database including relatively static data, such as atelephone book, order history, customer list, or the like. As describedbelow, such data may be stored in the high-density (e.g., flash) memory110 such that the apparatus benefits from the advantages of thehigh-density memory 110 without suffering from the disadvantages of thehigh-density memory 110.

In embodiments in which software 114 is employed for identifying dataretrieved from the first storage device 112 as characterized as datathat is (e.g., or will be) primarily read, similar to the monitoringlogic 118, the software 114 may make such identification based on (e.g.,by monitoring for) (1) a page attribute associated with a command toretrieve such data; (2) a memory address associated with the command(e.g., whether the memory address is included in a range of memoryaddresses identified as primarily-read); and/or (3) memory accesspatterns (e.g., to the volatile memory) for the memory addressassociated with the command. The software 114 may create a table ofmemory address ranges that characterizes memory addresses within suchranges (e.g., as read-only, cacheable, etc.). The software 114 mayprovide such table to the memory controller 106.

If it is determined, in step 204, that data retrieved from the firststorage device 112 is not characterized as data that is primarily read,step 206 is performed. In step 206, the retrieved data is written (e.g.,stored) in a volatile memory 108 and the method ends at step 212. If themonitoring device determines the retrieved data is not characterized asdata that is primarily read, such data may be written to more thaninfrequently. A write operation to the high-density (e.g., flash) memory110 relatively requires substantially more time (e.g., milliseconds)than a read or write operation to volatile memory 108 or a readoperation to the high-density memory 110 (e.g., nanoseconds), andtherefore, has a long latency. Consequently, by storing such data in thevolatile memory 108, the present methods and apparatus avoid one or moredisadvantages of the high-density (e.g., flash) memory 110.

Alternatively, if it is determined, in step 204, that data retrievedfrom the first storage device 112 is characterized as data that isprimarily read, step 208 is performed. In step 208, the retrieved datais written (e.g., stored) in a temporary storage device with a shortwrite latency. For example, in embodiments in which the volatile memory108 includes a portion 120 allocated as a working space that serves asthe temporary storage device, the retrieved data is stored in theportion 120. Similarly, in embodiments in which the apparatus 100includes a cache memory 122 that serves as the temporary storage device,the retrieved data is stored in the cache memory 122. As stated, thetemporary storage device may perform a write operation with shortlatency. Therefore, the data retrieved from the first storage device 112may be written relatively quickly (compared to a time required to writeto the high-density memory 110) (e.g., in nanoseconds) to the temporarystorage device. Further, the temporary storage device may perform a readoperation with short latency. Consequently, once the data retrieved fromthe first storage device 112 is stored in the temporary storage device,such data may be read relatively quickly (e.g., in nanoseconds) from thetemporary storage device (compared to a time required to write to thehigh-density memory 110).

In step 210, the retrieved data is written in a high-density memory. Asstated, a write operation to the high-density memory 110 has longlatency, and therefore, may not be written relatively quickly (e.g., maybe written in milliseconds) (compared to a read or write operation tovolatile memory 108). While the write operation is performed on thehigh-density memory 110, the high-density memory 110 is unavailable(e.g., data may not be read from the high-density memory 110). However,because the retrieved data was stored in the temporary storage device instep 208, the retrieved data remains available to be read from thetemporary storage device while the retrieved data is written to thehigh-density memory 110. In this manner, the apparatus 100 may avoid anyperformance degradation due to the long latency of a write operation tothe high-density memory 110. Once the retrieved data is written in thehigh-density memory 110, a read operation (e.g., with a relatively shortlatency) may be performed on the high-density memory 110 in response toread requests for such data. Thereafter, step 212 is performed, in whichthe method 200 ends.

Additionally, once the retrieved data is stored in the high-densitymemory 110, memory locations of the temporary storage device in whichthe retrieved data is stored may be made available for storing otherdata (e.g., the temporary memory is freed).

Through use of the method 200 of FIG. 2, the apparatus for efficientmemory usage may reap the high-density memory benefits of lower cost,lower power consumption for read operations and increased density, andavoid the high-density memory drawbacks of long write latency and higherpower consumption for a write operation than volatile memory.

FIG. 3 is a process flow diagram for efficient memory usage inaccordance with an embodiment of the present invention. With referenceto FIG. 3, the process flow diagram 300 illustrates exemplary operationof an apparatus for separating data to be stored in regular volatilememory from data that is primarily read and a good candidate for storagein high-density memory, such as the apparatus 100. For example, in step302 the apparatus 100 (e.g., processor 102 of the apparatus 100) isidle. In step 304, the apparatus 101 determines whether data wasretrieved from the first storage device 112. For example, the apparatus100 may determine whether the processor 102 received a request toretrieve data from the first storage device 112. If the apparatus 100determines no such request was received, the processor 102 becomes idle.Alternatively, if the apparatus 100 determines a request to retrievedata from the first storage device 112 was received, in response to therequest, the apparatus 100 may retrieve the data (e.g., retrieve memorylocations which store the data) from the first storage device 112.

In step 306, the apparatus 100 determines whether the data ischaracterized as data that is primarily read. If the apparatus 100determines the data is not characterized as data that is primarily read,in step 308, the apparatus 100 writes (e.g., stores) the data in thevolatile memory 108 (e.g., DRAM). Thereafter, the processor 102 becomesidle.

Alternatively, if the apparatus 100 determines, in step 306, that thedata is characterized as data that is primarily read, in step 310, theapparatus 100 stores the retrieved data in the temporary storage device(e.g., DRAM workspace 120). In step 312, the apparatus 100 writes theretrieved data to the high-density memory 110. Once the data is writtento the high-density memory 110, in step 314, memory addresses of thetemporary storage device in which the data is stored are made availablefor storing other data (e.g., freed). Thereafter, the processor 102 isidle.

FIGS. 4-5 illustrate a method for writing to high-density memory inaccordance with an embodiment of the present invention. With referenceto FIGS. 4-5, the method 400 for writing to high-density memory of FIGS.4-5 is similar to the method 200 for efficient memory usage. Morespecifically, steps 402-410 and 424 of method 400 are the same as steps202-212, respectively, and therefore, are not described in detailherein. In step 412, the apparatus 100 may receive a request to writedata to a memory address in the high-density memory 110. For example,the apparatus 100 may receive a request to write data to a memoryaddress included in a block of high-density memory addresses.

In step 414, one or more memory addresses of the temporary storagedevice equal to a minimum block size that may be written to thehigh-density memory are allocated. For example, the memory controller106 (e.g., logic included in the memory controller 106) may allocate aregion of the temporary storage device that is equivalent in size to aminimum block (e.g., of memory addresses) of high-density memory 110 towhich data may be written for storing data.

In step 416, the data is written to a memory address in the one or moreallocated memory addresses. For example, the memory controller 106 maywrite data to one or more memory addresses in the allocated region ofthe temporary storage device to reflect the changes to be made to datastored in the high-density memory 110. As stated, a write operation maybe performed on the temporary storage device with short latency. In thismanner, as stated, data may be written relatively quickly (e.g., innanoseconds) to the temporary storage device.

In step 418, data is read from memory addresses, which will remainunmodified, included in the block of high-density memory to which datais to be written. As stated, a read operation may be performed onhigh-density memory 110 with short latency. Therefore, the data fromunmodified memory addresses (e.g., addresses that will be unmodified bythe write request) included in the block of high-density memory thatincludes the memory address to which data is to be written may be readrelatively quickly (e.g., in nanoseconds).

In step 420, the data read from the unmodified memory addresses includedin the block of the high-density memory to which data is to be writtenis stored in the one or more allocated memory addresses of the temporarystorage device. As stated, a write operation may be performed on thetemporary storage device with short latency. Therefore, data may bestored (e.g., written) relatively quickly (e.g., in nanoseconds) to thetemporary storage device. In this manner, the allocated region of thetemporary storage device reflects the block on the high-density memory110 to which data is to be written after such data has been written tothe high-density memory 110.

In step 422, data stored in the one or more allocated memory addressesof the temporary storage device is written to the high-density memory110. For example, the memory controller 106 may write data from theallocated region of the temporary storage device to the high-densitymemory 110. As stated, write operations to the high-density memory 110may require milliseconds to complete, and therefore, result in longwrite latency. Further, the high-density memory 110 is unavailable untilthe write operation completes. However, because the allocated region ofthe temporary storage device reflects the block on the high-densitymemory 110 to which data is to be written after such data has beenwritten to the high-density memory 110, data stored in the high-densitymemory 110 may be retrieved from the temporary storage during the writeoperation to the high-density memory 110. Consequently, the long writelatency may be reduced and/or avoided. Thereafter, step 424 isperformed, in which the method 400 ends.

Additionally, once data stored in the one or more allocated memoryaddresses of the temporary storage device is written to the high-densitymemory 110, the one or more allocated memory addresses of the temporarystorage device are made available for storing other data (e.g., freed).

Through use of the method 400 of FIGS. 4-5, the apparatus 100 mayperform a data write operation on the high-density memory 110 whileavoiding the high-density memory drawback of long write latency.Although one or more of steps 412-422 are performed by the memorycontroller 106 (e.g., logic included in the memory controller 106, suchas control logic), another component may perform one or more of thesteps.

The foregoing description discloses only exemplary embodiments of theinvention. Modifications of the above disclosed apparatus and methodswhich fall within the scope of the invention will be readily apparent tothose of ordinary skill in the art. For instance, in some embodimentsthe apparatus 100 may adjust memory mapping in the memory controller106. Although the method 400 allocates one or more temporary storagedevice memory addresses equal to a minimum block size that may bewritten to the high-density memory, and transfers data corresponding tosuch block size between the temporary storage device and high-densitymemory 110, in other embodiments, the method 400 may allocate a regionof memory addresses to the temporary storage device corresponding to theentire high-density memory address range, and transfer datacorresponding to such region between the temporary storage device andhigh-density memory 110. In this manner, data stored in the entirehigh-density memory 110 may be retrieved from the temporary storageduring the write operation to the high-density memory 110 and therefore,is accessible. Consequently, the long write latency of the high-densitymemory is hidden.

According to a broader aspect of the invention, methods and apparatusare provided for (1) determining whether data retrieved from a firststorage device is characterized as data that is primarily read; and (2)if data retrieved from the first storage device is characterized as datathat is primarily read, writing the retrieved data in a high-densitymemory. In such embodiments, data retrieved from the first storagedevice 112 directly may be written to the high-density memory 110 (e.g.,the retrieved data may not be written to a temporary storage location,and therefore, such embodiments may not include a temporary storagelocation).

Accordingly, while the present invention has been disclosed inconnection with exemplary embodiments thereof, it should be understoodthat other embodiments may fall within the spirit and scope of theinvention, as defined by the following claims.

1. A method for efficient memory usage, comprising: determining whetherdata retrieved from a first storage device is characterized as data thatis primarily read; and if data retrieved from the first storage deviceis characterized as data that is primarily read: writing the retrieveddata in a temporary storage device with short write latency; and writingthe retrieved data in a high-density memory.
 2. The method of claim 1further comprising writing the retrieved data into a volatile memory ifthe data retrieved from the first storage device is not characterized asdata that is primarily read.
 3. The method of claim 1 further comprisingreading the retrieved data from the temporary storage device whilewriting the retrieved data in the high-density memory.
 4. The method ofclaim 1 wherein determining whether data retrieved from the firststorage device is characterized as data that is primarily read includes:monitoring for at least one of a processor access pattern to a memory,an attribute associated with a command and a memory address of thecommand; and identifying data retrieved from the first storage device ascharacterized as data that is primarily read based on the monitoring. 5.The method of claim 4, wherein monitoring for at least one of aprocessor access pattern to a memory, an attribute associated with acommand and a memory address of the command includes monitoring for atleast one of a processor access pattern to a memory, an attributeassociated with a command and a memory address of the command, viasoftware.
 6. The method of claim 4 wherein monitoring for at least oneof a processor access pattern to a memory, an attribute associated witha command and a memory address of the command includes monitoring for atleast one of a processor access pattern to a memory, an attributeassociated with a command and a memory address of the command, vialogic.
 7. The method of claim 1 wherein the temporary storage device isa cache memory.
 8. The method of claim 7 wherein a memory controllerincludes the cache memory.
 9. The method of claim 1 wherein thetemporary storage device is a portion of a volatile memory.
 10. Themethod of claim 1 further comprising making memory addresses of thetemporary storage device in which the retrieved data is stored availablefor storing other data.
 11. The method of claim 1 further comprising:receiving a request to retrieve data from the first storage device; andretrieving the data from the first storage device.
 12. The method ofclaim 1 further comprising: receiving a request to write data to amemory address in the high-density memory; allocating one or more memoryaddresses of the temporary storage device equal to a minimum block sizethat may be written to the high-density memory; writing the data to amemory address in the one or more allocated memory addresses; readingdata from memory addresses, which will remain unmodified, included inthe block of the high-density memory to which data is to be written;storing data read from the unmodified memory addresses included in theblock of the high-density memory to which data is to be written in theone or more allocated memory addresses of the temporary storage device;and writing data stored in the one or more allocated memory addresses ofthe temporary storage device to the high-density memory.
 13. The methodof claim 12 further comprising making the one or more allocated memoryaddresses of the temporary storage device available for storing otherdata.
 14. An apparatus for efficient memory usage, comprising: ahigh-density memory; a volatile memory; a first storage device; atemporary storage device with short write latency; and a monitoringdevice, coupled to the high-density memory, volatile memory, firststorage device, temporary storage device, and adapted to identify datawhich is characterized as primarily read; wherein the apparatus isadapted to: determine whether data retrieved from the first storagedevice is characterized as data that is primarily read; and if dataretrieved from the first storage device is characterized as data that isprimarily read: write the retrieved data in the temporary storagedevice; and write the retrieved data in the high-density memory.
 15. Theapparatus of claim 14 wherein the apparatus is further adapted to writethe retrieved data into the volatile memory if the data retrieved fromthe first storage device is not characterized as data that is primarilyread.
 16. The apparatus of claim 14 wherein the apparatus is furtheradapted to read the retrieved data from the temporary storage devicewhile writing the retrieved data in the high-density memory.
 17. Theapparatus of claim 14 wherein the apparatus is further adapted to:monitor for at least one of a processor access pattern to a memory, anattribute associated with a command and a memory address of the command;and identify data retrieved from the first storage device ascharacterized as data that is primarily read based on the monitoring.18. The apparatus of claim 17 wherein the apparatus is further adaptedto monitor for at least one of a processor access pattern to a memory,an attribute associated with a command and a memory address of thecommand, via software.
 19. The apparatus of claim 17 wherein theapparatus is further adapted to monitor for at least one of a processoraccess pattern to a memory, an attribute associated with a command and amemory address of the command, via the monitoring device.
 20. Theapparatus of claim 14 wherein the temporary storage device is a cachememory.
 21. The apparatus of claim 20 further comprising a memorycontroller coupled to the high-density memory, volatile memory and firststorage device; and wherein the memory controller includes the cachememory.
 22. The apparatus of claim 14 wherein the temporary storagedevice is a portion of the volatile memory.
 23. The apparatus of claim14 wherein the apparatus is further adapted to make memory addresses ofthe temporary storage device in which the retrieved data is storedavailable for storing other data.
 24. The apparatus of claim 14 whereinthe apparatus is further adapted to: receive a request to retrieve datafrom the first storage device; and retrieve the data from the firststorage device.
 25. The apparatus of claim 14 wherein the apparatus isfurther adapted to: receive a request to write data to a memory addressin the high-density memory; allocate one or more memory addresses of thetemporary storage device equal to a minimum block size that may bewritten to the high-density memory; write the data to a memory addressin the one or more allocated memory addresses; read data from memoryaddresses, which will remain unmodified, included in the block of thehigh-density memory to which data is to be written; store data read fromthe unmodified memory addresses included in the block of thehigh-density memory to which data is to be written in the one or moreallocated memory addresses of the temporary storage device; and writedata stored in the one or more allocated memory addresses of thetemporary storage device to the high-density memory.
 26. The apparatusof claim 25 wherein the apparatus is further adapted to make the one ormore allocated memory addresses of the temporary storage deviceavailable for storing other data.
 27. A method for efficient memoryusage, comprising: determining whether data retrieved from a firststorage device will only be read; and if data retrieved from the firststorage device is read-only data: storing the retrieved data in atemporary storage device with low write latency; and writing theretrieved data in a high-density memory.
 28. An apparatus for efficientmemory usage, comprising: a high-density memory; a volatile memory; afirst storage device; a temporary storage device with low write latency;and a monitoring device, coupled to the high-density memory, volatilememory, storage device and temporary storage device; wherein theapparatus is adapted to: identify data retrieved from the first storagedevice as read-only data; and if data retrieved from the first storagedevice is characterized as read-only data: store the retrieved data inthe temporary storage device; and write the retrieved data in thehigh-density memory.
 29. A method, comprising: storing data that ischaracterized as primarily read in high-density memory and temporarymemory; retrieving the data from temporary memory until the data hasbeen stored in high-density memory; and releasing the temporary memoryonce the data has been stored in the high-density memory.
 30. Anapparatus, comprising: a high-density memory; a temporary memory with alow write latency; and a monitoring device, coupled to the high-densitymemory and temporary memory, and adapted to identify data as primarilyread, wherein the apparatus is adapted to: store data that ischaracterized as primarily read in high-density memory and temporarymemory; retrieve the data from temporary memory until the data has beenstored in high-density memory; and release the temporary memory once thedata has been stored in the high-density memory.
 31. A method forefficient memory usage, comprising: determining whether data retrievedfrom a first storage device is characterized as data that is primarilyread; and if data retrieved from the first storage device ischaracterized as data that is primarily read, writing the retrieved datain a high-density memory.
 32. An apparatus for efficient memory usage,comprising: a high-density memory; a volatile memory; a first storagedevice; and a monitoring device, coupled to the high-density memory,volatile memory and first storage device; wherein the apparatus isadapted to: determine whether data retrieved from the first storagedevice is characterized as data that is primarily read; and if dataretrieved from the first storage device is characterized as data that isprimarily read, write the retrieved data in the high-density memory.